MEMS devices are becoming increasingly prevalent as new and additional applications are developed employing MEMS technology. In many applications, it is important that the manufacturing processes for forming the MEMS structure is compatible with integrated circuit manufacturing processes, particularly CMOS manufacturing processes. This is particularly so as, in many applications, MEMS devices are formed simultaneously with formation of CMOS devices, or at least formed on the substrate as CMOS devices.
The use of a polysilicon structure in the formation of MEMS devices is well known. The tendency of a native oxide to grow on polysilicon structures is also well known. Such native oxides can have deleterious effects, such as delamination of layers formed atop the polysilicon structure from the polysilicon structure. This delamination may arise, for example, because the native oxide between the polysilicon structure and the overlying layer can be partially etched or undercut during other oxide etches, resulting in weak interface between the two.
Special clean processes and strict control on queue time have been proposed to remove any native oxide or to limit the time in which a native oxide can form. These approaches may be impractical from the perspective of the additional costs and loading of equipment in a manufacturing environment. Other proposed approaches have involved formation of special additional layers to reduce or eliminate the formation of a native oxide. The approaches are also unsatisfactory from the perspective of costs and additional complexity. What is needed, then, is a practical, low-cost solution to the problems associated with formation of native oxides on polysilicon features of a MEMS device.